SCEE : Signal, Communication & Embedded Electronics

Software radio and cognitive radio are based on processing architectures demanding a very high computing power and requiring multi-processing structures. Architectural constraints are therefore very demanding and the use of devices of different natures is often necessary. Reconfiguration management of software radio systems consequently involves complex techniques and methods. Devices may be as various as processors (micro-controlers or general purpose processors), DSPs, FPGAs, digital parameterizable ASICs, etc. We speak about HW heterogeneity.

Involved staff

    Jacques PALICOT (Professor)
    Pierre LERAY (Associate Professor)
    Yves LOUET (Associate Professor)
    Christophe MOY (Associate Professor)
    Virgilio RODRIGUEZ (post-doctor)
    Ali AL GHOUWAYEL (doctor student)
    Jean-Philippe DELAHAYE (doctor student)
    Hongzhi WANG (doctor student))
    Loïg GODARD (doctor student))


FPGA dynamic partial reconfiguration architecture for software defined radio systems

Based on the study of several reconfiguration scenarios (at the standard, the mode or the bug-fixing level) a hierarchical distributed approach is priviledged. Combined with a multi-standard analysis (GSM, UMTS FDD, 802.11g) which provides rules of mapping of the SW processing functions on the heterogeneous HW devices, we propose a multi-layer reconfiguration management. 3 layers have been defined, each managing reconfiguration at different levels of granularity, but also in various locations inside the system, e.g. in HW components of different nature. High-level (standard level) management layer indeed is preferably dedicated to be implemented in a GPP for high-granularity reconfiguration, while low-level (algorithm level) managers may be mapped on DSPs or even embedded processor cores inside FPGAs in order to be as close as possible of the SW processing elements they manage. This reconfiguration hierarchical management is closely related with our parameterization and common operators studies also exposed in this page. In the specific context of reconfigurable hardware, this study particularly focuses on the partial and dynamic reconfiguration FPGAs, which we implement of Xilinx Virtex II components.

Doctor student: Jean-Philippe DELAHAYE
Supervisor: Jacques PALICOT

This is an extension of the previous subject towards cognitive radios. A distributed hierarchical management is also proposed for the cognitive side of the system.

Doctor student: Loïg GODARD
Supervisor: Christophe MOY

This study focuses on the design of a specific flexible architecture for the implementation of MIMO signals detection on FPGA. The algorithm under investigation is the V-BLAST "Square Root" in a software radio context. The proposed architecture uses the CORDIC algorithm as an elementary operator. The optimization of HW resources is obtained by dynamically adapting the parallelism level to the computing power for a given MIMO configuration and a given data rate.

Doctor student: Hongzhi WANG
Supervisor : Pierre LERAY

Parameterization studies are a new specific field of software radio. Two types of parameterization can be distinguished: common funcions or common operators. The goal consists in finding a set of common operators (or a common function) at a the highest level of granularity which can keep genericity properties to be implemented for the maximum of processes of a multi-standard software radio terminal (including future standards). We are currently formalizing this approach in the frequency domain for processes usually done in the time domain until now, in order to take benefit of the FFT or butterfly common operator. A focus is done on the channel decoding functionalities.

Doctor student: Ali AL GHOUWAYEL
Supervisor : Yves LOUET

The lab is involved in an original parameterization approach based on a "common opertor" perspective for the cross-layer optimization for multi-standards software radio systems. The main objective consists in factorizing processing entities between as many as possible of the algorithms of a plurality of standards in order to minmize the reconfiguration overheads needed to switch from one standard (GSM for example) to another (UMTS for example). This permits to avoid time and bandpass consuming downloading procedures for the reconfiguration of the system during a standard switch, since the same set of operators should be able of running both standards while only changing parameters of the operators.
A model has been defined, based on an hypergraph description of the multi-standard system. First optimization algorithms are defined. Costs involved in the optimization are still to be refined. Expected results are the choice of the set of common operators to be implemented for different combinations of software radio multi-standards systems.

Post-doctor: Virgilio RODRIGUEZ
Supervisor: Christophe MOY