RESET [addr] - MCU Hardware Reset with Existing/New Reset Vector. This command causes the MCU to generate a hardware reset and optionally start execution of user code at
or at the address specified by a previous RESET command. Once the reset occurs, the default implementation of PCbug11 causes the talker code to re-initialised, and then the MCU either idles, if no user specified address was given in the command line, or the talker code jumps to the address specified by on the command line. Note that once has been specified, it is maintained in the talker code until replaced by another value. Refer to the appropriate talker code source listing for details. Note: To simulate an external hardware reset, the RESET command forces the MCU to generate an internal reset which also causes the external RESET pin to go low. To produce the internal reset, the Clock Monitor Fail detector is used. PCbug11 implements this by downloading and executing the following code in a reserved area of RAM: STY cme_jmp Clock monitor fail jump address STAA OPTION,X OPTION=$39 STAB TEST1,X TEST1=$3E STOP JMP user_start <- in case STOP doesn't generate CME reset! Where: Y=user reset address X=$1000 Default I/O register base address for M68HC11 ACCA=$08 Enables the clock monitor in the OPTION reg. The values passed to ACCB, CCR and Y depend on the MCU type & operating mode. In Bootstrap mode: If MCU is an 'A8, ACCB=0 to clear the DISR bit in TEST1 reg. For all other devices, ACCB=4 to force the clock monitor reset by setting the FCM bit in TEST1 reg. For all devices, CCR=$40 to enable the STOP instruction and I bit interrupts, and disable XIRQ to allow execution of the instruction after STOP if all else fails! The user reset address is $0000. In External mode: For all devices, ACCB=$0, since TEST1 is not accessible in normal modes. CCR=$10 to enable STOP and XIRQ, and disable I bit interrupts. The user reset address is defined by the user in the appropriate .MAP file. Note also that the above reset code forces the value in the Clock Monitor Fail vector, before starting user code execution. This means that the user must dynamically assign this vector in software before using the feature. The effect of this internal reset is identical to an external hardware reset, except that the COP Clock Monitor fail vector is taken instead of the RESET vector - provided the rising edge of the reset output signal is not delayed by external capacitance. Refer to the M68HC11 data book and User manual for details.
Return to summary